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FAT and SAT in BMS: What They Are and Why They Matter

July 22, 2026 · 8 min read · By EnSmart
Commissioning · Fundamentals

FAT and SAT in BMS: What They Are and Why They Matter

Published by EnSmart  ·  Building Intelligence  ·  8 min read

FAT and SAT — Factory Acceptance Test and Site Acceptance Test — are the two checkpoints that confirm a DDC panel actually does what it was specified to do, once before it leaves the factory and once again after it's installed on site. Skip either one, and the first time anyone finds out a panel doesn't work correctly is during live commissioning, with the building already occupied.

This guide explains what FAT and SAT actually cover, why they're both necessary rather than redundant, and what a real FAT and SAT BMS punch list looks like for a DDC panel specifically — not just the generic industrial version most articles describe.

Quick Answers: FAT and SAT Full Forms

What does FAT stand for?

FAT stands for Factory Acceptance Test — a test carried out at the panel builder's or manufacturer's facility, before the equipment ships to site.

What does SAT stand for?

SAT stands for Site Acceptance Test — a test carried out after the equipment is installed at the actual project site, confirming it survived transit and works with real field devices.

Is FAT the same as FAT (File Allocation Table)?

No — in building automation and controls, FAT means Factory Acceptance Test. It's unrelated to the File Allocation Table (also abbreviated FAT), which is a computer storage filesystem format used on older drives and USB devices.

2 stages FAT at the factory, SAT at the finished site
Before ship FAT happens before the panel ever leaves the factory
Post-install SAT confirms nothing broke or drifted in transit
Cheaper fix A fault caught at FAT costs far less than the same fault found at SAT

FAT: Testing the Panel Before It Ever Leaves the Factory

A Factory Acceptance Test happens at the panel builder's facility, before shipment, with the client's representative present or reviewing recorded results. For a DDC panel, this means every controller is powered up, every IO point is simulated against the approved IO schedule, and every sequence of operation is exercised against the design intent — while the panel is still sitting on a bench where a wiring fix takes minutes, not a site visit.

The point of FAT isn't just "does it turn on." It's proving the panel matches what was actually specified and paid for, before it becomes far more expensive to fix.

A wiring error caught at FAT is a five-minute fix on the bench. The same error caught after the panel is installed on a rooftop plant room is a return site visit.

SAT: Confirming Nothing Changed Between the Factory and the Field

A Site Acceptance Test happens after the panel is installed and wired to real field devices at the actual project site. It's not a repeat of FAT — it exists because a panel that passed every test on the bench can still arrive with a loose terminal from transit vibration, or discover that a field device's actual signal doesn't quite match what the design drawing specified.

SAT also introduces real conditions FAT can't fully simulate: actual cable run lengths, actual ambient temperature in the plant room, actual electrical noise from nearby equipment. A panel that behaved perfectly on a clean factory bench sometimes reveals a marginal issue only once it's wired into the real building.

FAT vs SAT — Side by Side

Factor FAT SAT
LocationPanel builder's factoryThe actual project site
IO testing methodSimulated signals on a benchReal field devices, real wiring runs
Environmental conditionsControlled factory environmentActual site temperature, humidity, electrical noise
Documentation depthVery detailed — full point-by-point sign-offLighter — confirms transit and installation integrity
Cost of a fault found hereLow — bench access, no site mobilisationHigher — site visit, possible schedule delay

Specifying a DDC panel and want FAT documentation you can actually hand to your client? EnSmart runs full point-by-point FAT on every SmartNova panel before it ships.

See SmartNova DDC specs →

A Real FAT Punch List for a DDC Panel

Generic FAT checklists talk about "input/output verification" in the abstract. For a DDC panel specifically, that breaks down into concrete, testable items:

  • Drawing verification — as-built wiring matches the approved panel drawings, terminal for terminal
  • IO point simulation — every AI, AO, DI, DO channel tested against the approved IO schedule with a simulated signal, confirming the controller reads and writes the correct value
  • Sequence of operation testing — economizer logic, staging, reset schedules exercised against the design intent, not just confirmed to exist
  • Alarm and interlock verification — every alarm condition forced and confirmed to trigger correctly, including safety interlocks like freeze protection
  • Network and protocol check — BACnet or Modbus points confirmed visible and correctly labelled from a test workstation
  • Physical inspection — terminal torque, wire labelling, DIN-rail seating, and enclosure IP rating confirmed against spec

A Real SAT Punch List for a DDC Panel

  • Transit damage check — terminal torque re-verified, no loosened connections from shipping vibration
  • Live field device confirmation — every point re-checked against the real sensor or actuator, not a simulated signal
  • Startup sequence — equipment brought online in the correct order, confirming interlocks behave correctly with real loads
  • Network integration — panel confirmed visible and correctly mapped on the site's actual BMS supervisor, not a test workstation
  • Punch list — any open items logged with a clear owner and close-out date before final sign-off
Result: a panel that's been proven twice — once against its own design, once against the real building it now lives in.

Why Skipping FAT to "Save Time" Usually Costs More

On a tight schedule, FAT is sometimes the first thing cut — the panel gets shipped straight to site, and the plan is to sort out any issues during commissioning instead. This almost always backfires. A wiring error or a mis-programmed sequence found on a factory bench is a same-day fix. The identical error found during on-site commissioning means a technician, a site visit, and often a delay to a schedule that's already tight — for a fault that FAT would have caught for the cost of an extra afternoon.

FAT and SAT aren't paperwork for the sake of paperwork — they're the cheapest insurance a project ever buys against a site visit nobody budgeted for.

Frequently Asked Questions

Who should be present at a FAT?

Ideally the client's representative or consultant attends in person, or reviews recorded results remotely. The panel builder's commissioning engineer runs the test itself, walking through the IO schedule and sequence of operation point by point.

Can SAT be skipped if FAT already passed?

No. FAT and SAT test different things — FAT confirms the panel matches its design on a factory bench, SAT confirms it survived transit and works correctly with real field devices under real site conditions. A panel that passes FAT can still fail SAT due to shipping damage, a mismatched field device signal, or site-specific electrical noise.

How long does a FAT take for a DDC panel?

This depends on point count and sequence complexity, but a single-panel AHU or chiller plant FAT typically takes a few hours to a full day, covering IO point simulation, sequence testing, and alarm verification point by point.

What happens if a panel fails FAT?

Any failed items are logged on a punch list with a clear owner and close-out date. The panel is corrected and re-tested on the same bench before shipment — this is exactly why FAT is valuable, since a fault caught here is a same-day fix rather than a site visit after installation.

Where to Go Deeper

For a closer breakdown of what distinguishes each stage, see our library answer on FAT vs SAT acceptance tests. If you're building the IO schedule these tests are run against, see what is an IO list in BMS.

For the complete set of controller topics, browse the full Controllers section of the EnSmart BMS Library.


Two Checkpoints, Not One Redundant Repeat

In short, FAT and SAT test two different things: FAT proves the panel matches its design on the bench, where fixes are cheap. SAT proves that design survives contact with the real building — real cable runs, real field devices, real conditions. Running both isn't duplication. It's the difference between finding a fault for the cost of an afternoon, and finding the same fault for the cost of a site visit and a delayed handover.

Specifying a DDC panel for an upcoming project?

Every SmartNova panel ships with a full point-by-point FAT report — send your IO list and EnSmart will confirm the testing scope within 24 hours.

See SmartNova DDC Controller → Get a demo
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